在设备树中修改对应spi时钟输入 linux-3.10\arch\arm\boot\dts\sun8iw11p1-OKA40i_C.dts &spi2 { status = "okay"; clock-frequency = <60000000>; spidev_cs0:spi2_cs0@0{ #address-cells=<1>; #size-cells=<1>; compatible = "spidev"; spi-max-frequency = <80000000>; // 这个数值不能大于80MHz,spi驱动会检查 reg = <0>; mode=<0>; }; spidev_cs1:spi2_cs1@1{ #address-cells=<1>; #size-cells=<1>; compatible = "spidev"; spi-max-frequency = <80000000>; reg = <1>; mode=<0>; }; }; linux-3.10\arch\arm\boot\dts\sun8iw11p1-pwm1.dtsi spi2: spi@01c17000 { #address-cells = <1>; #size-cells = <0>; compatible = "allwinner,sun8i-spi"; device_type = "spi2"; reg = <0x0 0x01c17000 0x0 0x1000>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_pll_periph0>, <&clk_spi2>; clock-frequency = <60000000>; // 修改时钟频率 pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi2_pins_a &spi2_pins_b>; pinctrl-1 = <&spi2_pins_c>; spi2_cs_number = <2>; spi2_cs_bitmap = <3>; status = "okay"; // 改为okay }; 修改完毕后在系统中可以查看对应频率 # mount -t debugfs none /sys/kernel/debug # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- pll_periph0 3 3 600000000 # 600MHz spi2 1 1 60000000 # 60MHz spi0 1 1 100000000 # 100MHz spi2被成功修改到了60MHz的输入 使用飞凌测试应用测试30MHz是否工作正常 # fltest_spi -s 30000000 spi mode: 0 bits per word: 8 max speed: 30000000 Hz (30000 KHz) FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF DE AD BE EF BA AD F0 0D |
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